LH28F008SC 데이터 시트보기 (PDF) - Sharp Electronics

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LH28F008SC

8M (1M × 8) Flash Memory

Sharp Electronics 

8M (1M × 8) Flash Memory

RESET OPERATIONS

LH28F008SC

RY/BY (R) VIH

VIL

VIH

RP (P)

VIL

tPLPH

A. Reset During Read Array Mode

RY/BY (R)

VIH

VIL

RP (P)

VIH

VIL

tPLRH

tPLPH

B. Reset During Block Erase, Byte Write, or Lock-Bit Configuration

Figure 18. AC Waveform for Reset Operation

28F008SC-18

Reset AC Specifications1

SYMBOL

PARAMETER

tPLPH

tPLRH

RP » Pulse Low Time (If RP » is tied to VCC, this

specification is not applicable)

RP » Low to Reset during Block Erase, Byte Write, or

Lock-Bit Configuration

VCC = 3.3 V

MIN. MAX.

VCC = 5 V

MIN. MAX.

UNIT NOTE

100

100

ns

20

12

µs

2,3

NOTES:

1. These specifications are valid for all product versions (packages and speeds).

2. If RP » is asserted while a block erase, byte write, or lock-bit configuration operation is not executing,

the reset will complete within 100 ns.

3. A reset time tPHQV, is required from the latter of RY »/BY » or RP » going high until outputs are valid.

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