M24M01-FCX6P 데이터 시트보기 (PDF) - STMicroelectronics

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M24M01-FCX6P

1-Mbit serial I²C bus EEPROM

STMicroelectronics 

M24M01-R M24M01-DF

Device operation

4.5

Device addressing

To start communication between the bus master and the slave device, the bus master must

initiate a Start condition. Following this, the bus master sends the device select code, shown

in Table 2 (most significant bit first).

Table 2. Device select code

Device type identifier(1)

Chip Enable

address(2)

When accessing

b7

b6

b5

b4

b3

b2

the memory

1

0

1

0

E2

E1

When accessing

the Identification

1

0

1

1

E2

E1

page

1. The most significant bit, b7, is sent first.

2. E2,E1 are compared against the external pin on the memory device.

3. X = don’t care.

Address

bit

RW

b1

b0

A16

RW

X(3)

RW

When the device select code is received, the device only responds if the Chip Enable

address is the same as the value on its Chip Enable E2,E1 inputs.

The 8th bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.

If a match occurs on the device select code, the corresponding device gives an

acknowledgment on Serial Data (SDA) during the 9th bit time. If the device does not match

the device select code, the device deselects itself from the bus, and goes into Standby

mode.

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