ADSP-BF538 데이터 시트보기 (PDF) - Analog Devices

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ADSP-BF538

Blackfin® Embedded Processor

Analog Devices 

Preliminary Technical Data

ADSP-BF538/ADSP-BF538F

Table 10. Pin Descriptions (Continued)

Pin Name

Real Time Clock

RTXI

RTXO

JTAG Port

TCK

TDO

TDI

TMS

TRST

EMU

Clock

CLKIN

XTAL

Mode Controls

RESET

NMI

BMODE1–0

Voltage Regulator

VROUT0

VROUT1

GPW

Supplies

VDDEXT

VDDINT

VDDRTC

GND

I/O

Function

Driver Type

I

RTC Crystal Input

O

RTC Crystal Output

I

JTAG Clock

O

JTAG Serial Data Out

C

I

JTAG Serial Data In

I

JTAG Mode Select

I

JTAG Reset (This pin should be pulled LOW if the JTAG port will not be used.)

O

Emulation Output

C

I

Clock/Crystal Input

O

Crystal Output

I

Reset

I

Non-maskable Interrupt (This pin should be pulled HIGH when not used.)

I

Boot Mode Strap

O

External FET Drive 0

O

External FET Drive 1

I/O

General-purpose regulator wakeup (This pin should be pulled HIGH when not

used)

P

I/O Power Supply

P

Internal Power Supply

P

Real Time Clock Power Supply

G

Ground

Rev. PrD | Page 21 of 56 | May 2006

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