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ADSP-BF538 데이터 시트보기 (PDF) - Analog Devices

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ADSP-BF538
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Analog Devices ADI
ADSP-BF538 Datasheet PDF : 56 Pages
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ADSP-BF538/ADSP-BF538F
TABLE OF CONTENTS
General Description ................................................. 3
Low Power Architecture ......................................... 3
System Integration ................................................ 3
ADSP-BF538/ADSP-BF538F Processor Peripherals ....... 3
Blackfin Processor Core .......................................... 4
Memory Architecture ............................................ 5
DMA Controllers .................................................. 8
Real Time Clock ................................................... 9
Watchdog Timer .................................................. 9
Timers ............................................................... 9
Serial Ports (SPORTs) .......................................... 10
Serial Peripheral Interface (SPI) Ports ...................... 10
Two Wire Interface ............................................. 10
UART Ports ...................................................... 10
General-Purpose Ports ......................................... 11
Parallel Peripheral Interface ................................... 11
Controller Area Network (CAN) Interface ................ 12
Dynamic Power Management ................................ 12
Voltage Regulation .............................................. 14
Clock Signals ..................................................... 14
Booting Modes ................................................... 15
Instruction Set Description ................................... 15
Development Tools ............................................. 16
Designing an Emulator Compatible Processor Board ... 17
Voltage Regulator Layout Guidelines ....................... 17
Pin Descriptions .................................................... 18
Specifications ........................................................ 22
REVISION HISTORY
5/06—Revision PrD:
For this revision, the following sections were changed.
Functional Block Diagram ......................................... 1
Booting Modes ...................................................... 15
Pin Descriptions .................................................... 18
Output Drive Currents ............................................ 44
Power Dissipation .................................................. 46
Test Conditions ..................................................... 46
316-Ball Mini-BGA Pinout ....................................... 51
Preliminary Technical Data
Operating Conditions ........................................... 22
Operating Conditions—Applies to 5V Tolerant pins .... 22
Electrical Characteristics ....................................... 22
Absolute Maximum Ratings ................................... 23
Package Information ............................................ 23
ESD Sensitivity ................................................... 23
Timing Specifications ........................................... 24
Clock and Reset Timing ..................................... 24
Asynchronous Memory Read Cycle Timing ............ 25
Asynchronous Memory Write Cycle Timing ........... 27
SDRAM Interface Timing .................................. 29
External Port Bus Request and Grant Cycle Timing .. 30
Parallel Peripheral Interface Timing ...................... 32
Serial Port Timing ............................................ 35
Serial Peripheral Interface Port—Master Timing ...... 39
Serial Peripheral Interface Port—Slave Timing ........ 40
General-Purpose Port Timing ............................. 41
Timer Cycle Timing .......................................... 42
JTAG Test And Emulation Port Timing ................. 43
Output Drive Currents ......................................... 44
Power Dissipation ............................................... 46
Test Conditions .................................................. 46
Thermal Characteristics ........................................ 50
316-Ball Mini-BGA Pinout ....................................... 51
Outline Dimensions ................................................ 54
Surface Mount Design .......................................... 55
Ordering Guide ..................................................... 55
Rev. PrD | Page 2 of 56 | May 2006

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