BR24G04FJ-3A 데이터 시트보기 (PDF) - ROHM Semiconductor
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BR24G04FJ-3A Datasheet PDF : 36 Pages
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BR24G04-3A
●Write Command
○ Write cycle
・Arbitrary data is written to EEPROM. When to write only 1 byte, byte write is normally used, and when to write continuous
data of 2 bytes or more, simultaneous write is possible by page write cycle. Up to 16 arbitrary bytes can be written.
SDA
LINE
S
W
T
R
A
I
R
SLAVE T
T
ADDRESS E
1 0 1 0 A2 A1 P0
WA
7
RA
/C
WK
WORD
ADDRESS
WA
0
D7
A
C
K
S
T
DATA
O
P
D0
A
C
K
Figure 36. Byte write cycle
SDA
LINE
S
W
T
R
A
I
R
SLAVE T
T
ADDRESS E
WORD
ADDRESS(n)
DATA(n)
1 0 1 0 A2 A1P0
WA
7
WA D7
0
RA
A
/C
C
WK
K
Figure 37. Page write cycle
D0
A
C
K
S
T
DATA(n+15)
O
P
D0
A
C
K
・During internal write execution, all input commands are ignored, therefore ACK is not sent back.
・Data is written to the address designated by word address (n-th address)
・By issuing stop bit after 8bit data input, write to memory cell inside starts.
・When internal write is started, command is not accepted for tWR (5ms at maximum).
・By page write cycle, data up to 16 bytes can be written in bulk.
And when data of the maximum bytes or higher is sent, data from the first byte is overwritten.
(Refer to "Internal address increment")
・As for page write command of BR24G04-3A after page select bit ’P0’ of slave address are designated arbitrarily, by
continuing data input of 2 bytes or more, the address of insignificant 4 bits is incremented internally, and data up to 16
bytes can be written.
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