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CT2566 데이터 시트보기 (PDF) - Aeroflex Corporation

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CT2566 Datasheet PDF : 37 Pages
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12MHz Clock
(Internal)
STRBD (41)
SELECT (1)
IOEN (42)
READYD (3)
MEM/REG (10)
RD/WR (2)
See Note
td1
td9
td2
tpw1
A02 (38)
A01 (77)
A00 (39)
SSFLAG, SSBUSY, SVCRQST
DBAC, RTU/BC, MT, CTLIN B/A
td8
DATA LATCHED
Configuration Register Only
D15-D00
DATA VALID
td10
NOTE: STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
SYMBOL
td1
td2
tpw1
td8
td9
td10
CPU Writes to Internal Register
DESCRIPTION
MIN
READYD low delay (CPU Handshake)
-
IOEN high delay (CPU Handshake)
-
READYD pulse width (CPU Handshake)
70
Internal Register delay (write)
-
Register Data/Address set-up time
-
Register Data/Address hold time
-
MAX
200
20
-
60
40
0
UNITS
ns
ns
ns
ns
ns
ns
Aeroflex Circuit Technology
Figure 22 – CPU writes to internal register
20
SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700

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