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EL1056C 데이터 시트보기 (PDF) - Elantec -> Intersil

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EL1056C
Elantec
Elantec -> Intersil Elantec
EL1056C Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
EL1056AC EL1056C
Monolithic High-Speed Pin Driver
Applications Information Contd
Overcurrent Protection
The sense comparators are available to alert the
test system’s controller that the driver is output-
ting excessive current Shunt resistors are con-
nected from Ba to Shunta and Bb to Shuntb
When the internal comparators sense more than
a nominal 200 mV drop on the shunts they cause
a 1 5 mA current to be sunk from the Sense ter-
minal The comparators are of ‘‘slow attack fast
decay’’ design so that transient load currents will
not trigger a sense output only a sustained over-
current will
The sense resistors must not be inductive and
the skin resistance of long narrow connections
between Shunt and Ba or Bb can cause tran-
sient voltages that produce output overshoot
(but not ringing)
The Sense output is simply a switched current
source connected to Vb It can be used to inter-
face to CMOS TTL or ECL inputs For CMOS
and TTL it can be connected to a pull-up resistor
to a5V of 10K value This establishes a logic
high value and a clamp diode (internal to TTL)
establishes a low level of b0 6V For ECL a gate
should be available to provide a static logic high
level An 820X pull-up resistor is wired to that
output The logic low will be more negative than
is usual for ECL but this will cause no problem
In all cases multiple Sense outputs may be con-
nected together from many drivers to effect a
wired-or function
A further protection scheme is to provide a series
resistor from Ba to Va and Bb to Vb The
resistor serves to limit the output fault current
by allowing Ba and Bb voltages to sag under
heavy load This also reduces the dissipation on
the output transistors for valid loads Because
Ba and Bb are separately bypassed these volt-
ages will sustain under transient loads and dy-
namics will not be affected
Output Accuracy
The accuracy of the output voltage depends on
several factors The first is the gain error from
VINH or VINL to the output unloaded The gain
error is nominally b0 6% and has a few tenths
of a percent variation between parts The second
is supply rejection If the Ba Bb Shunta or
Shuntb voltages are different from those used
by Elantec to test the part there will be about
2 2 mV systematic shift in output offset per volt
of supply variation The Va and Vb supplies
have much less influence on output error Final-
ly there is a random VOS error as specified in the
data table
Of course the finite output impedance of the
EL1056 will cause additional output error when
the driver is loaded
Power-Down
The EL1056 incorporates a power-down feature
that drastically reduces power consumption of an
unused driver and also drops the output leakage
current to nanoamperes (‘‘A’’ grade only) The
output is not a low capacitance in this mode
however and transients driven from the cable
can momentarily turn on the output transistors
Power-down is intended to allow the switching of
accurate DC meters onto the bus without having
to relay out the driver’s leakage current It takes
about 40 ms for the output leakage to sag to na-
noamperes but this is still much faster than re-
lays or voltmeters
Power-down is controlled by the E and E differ-
ential inputs There is no problem with logic am-
plitude or slewrate and input resistor networks
are not needed
13

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