74LVC2952ADB 데이터 시트보기 (PDF) - Philips Electronics

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74LVC2952ADB

Octal registered tranceiver with 5-volt tolerant inputs/ouputs (3-State)

Philips Electronics 

Philips Semiconductors

Octal registered tranceiver with 5-volt tolerant

inputs/ouputs (3-State)

Product specification

74LVC2952A

FEATURES

• 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic

• Wide supply voltage range of 1.2 V to 3.6 V

• In accordance with the JEDEC standard no. 8-1 A

• Inputs accept voltages up to 5.5 V

• CMOS low power consumption

• Flow-through pin-out architecture

• 3-State outputs

• Direct interface with TTL levels

• Integrated 30W damping resistor

DESCRIPTION

The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device

and superior to most advanced CMOS compatible TTL families. The

74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit

back to back registers store data flowing in both directions between two

bidirectional busses. Data applied to the inputs is entered and stored on

the rising edge of the clock (CPnn) provided that the clock enable CEnn)

is LOW. The data is then present at the 3-State output buffers, but is

only accessible when the output enable input (OEnn) is LOW. Data flow

from A inputs to B outputs is the same as for B inputs to A outputs. The

74LVC2952A is identical to the 74LVC2953A but has non-inverting

outputs.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/tPLH

Propagation delay

CPnn to An, Bn

CL = 50 pF;

VCC = 3.3 V

fmax

Maximum clock frequency

CI

Input capacitance

CI/O

Input/output capacitance

CPD

Power dissipation capacitance per buffer

VCC = 3.3V1

NOTE:

1 CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacity in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

ȍ (CL × VCC2 × fo) = sum of the outputs.

TYPICAL

4.3

150

5

10

31

ORDERING INFORMATION

PACKAGES

24-Pin Plastic SO

24-Pin Plastic SSOP Type II

24-Pin Plastic TSSOP Type I

TEMPERATURE RANGE OUTSIDE NORTH AMERICA

–40°C to +125°C

74LVC2952A D

–40°C to +125°C

74LVC2952A DB

–40°C to +125°C

74LVC2952A PW

NORTH AMERICA

74LVC2952A D

74LVC2952A DB

74LVC2952APW DH

UNIT

ns

MHz

pF

pF

pF

PKG. DWG. #

SOT137-1

SOT340-1

SOT355-1

PIN CONFIGURATION

B7 1

B6 2

B5 3

B4 4

B3 5

B2 6

B1 7

B0 8

OEAB 9

CPAB 10

CEAB 11

GND 12

24 VCC

23 A7

22 A6

21 A5

20 A4

19 A3

18 A2

17 A1

16 A0

15 OEBA

14 CPBA

13 CEBA SV01716

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

8, 7, 6, 5, 4, 3, 2, 1,

12

B0 to B7

GND

B data inputs/outputs

Ground (0 V)

9, 15

OEAB,OEBA

Output enable inputs

(active LOW)

10, 14

11, 13,

16, 17, 18, 19, 20,

21, 22, 23

CPAB, CPBA Clock inputs

CEAB, CEBA Clock enable inputs

A0 to A7

A data inputs/outputs

24

VCC

Positive supply voltage

1998 Jul 29

2

853-1993 19803

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