DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AD7228 데이터 시트보기 (PDF) - Analog Devices

부품명
상세내역
제조사
AD7228
ADI
Analog Devices ADI
AD7228 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Data Sheet
AD7228
SPECIFICATIONS
DUAL SUPPLY
VDD = 10.8 V to 16.5 V, VSS = −5 V ± 10%, GND = 0 V, VREF = 2 V to 10 V, RL = 2 kΩ, CL = 100 pF, unless otherwise noted. All
specifications TMIN to TMAX, −40°C to +85°C unless otherwise noted. VOUT must be less than VDD by 3.5 V to ensure correct operation.
Table 1.
Parameter
STATIC PERFORMANCE
Resolution
Total Unadjusted Error (TUE)1
Relative Accuracy
Differential Nonlinearity
Full-Scale Error2
Zero Code Error
at 25°C
TMIN to TMAX
Minimum Load Resistance
REFERENCE INPUT
Voltage Range
Input Resistance
Input Capacitance3
AC Feedthrough
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current
Input Capacitance3
Input Coding
DYNAMIC PERFORMANCE3
Voltage Output Slew Rate
Voltage Output Settling Time
Positive Full-Scale Change
Negative Full-Scale Change
Digital Feedthrough
Digital Crosstalk4
POWER SUPPLIES
VDD Range
VSS Range
IDD
at 25°C
TMIN to TMAX
ISS
at 25°C
TMIN to TMAX
K and B
Versions
8
±2
±1
±1
±1
±25
±30
2
2/10
2
500
−70
2.4
0.8
±1
8
Binary
2
5
5
50
50
10.8/16.5
−4.5/−5.5
16
20
14
18
L and C
Versions
8
±1
±1/2
±1
±1/2
±15
±20
2
2/10
2
500
−70
2.4
0.8
±1
8
Binary
2
5
5
50
50
10.8/16.5
−4.5/−5.5
16
20
14
18
Unit
Test Conditions/Comments
Bits
LSB max
LSB max
LSB max
LSB max
VDD = 15 V ± 10%, VREF = 10 V
Guaranteed monotonic
Typical temperature coefficient is 5 ppm/°C with
VREF = 10 V
mV max
mV max
kΩ min
Typical temperature coefficient is 30 µV/°C
VOUT = 10 V
V min/V max
kΩ min
pF max
dB typ
Occurs when each DAC is loaded with all 1s
VREF = 8 V p-p sine wave at 10 kHz
V min
V max
µA max
pF max
VIN = 0 V or VDD
V/µs min
µs max
µs max
nV-sec typ
nV-sec typ
VREF = 10 V; settling time to ±1/2 LSB
VREF = 10 V; settling time to ±1/2 LSB
Code transition all 0s to all 1s, VREF = 0 V; WR = VDD
Code transition all 0s to all 1s, VREF = 10 V; WR = 0 V
V min/V max
V min/V max
mA max
mA max
mA max
mA max
For specified performance
For specified performance
Outputs unloaded; VIN = VINL or VINH
Outputs unloaded; VIN = VINL or VINH
1 Total unadjusted error includes zero code error, relative accuracy, and full-scale error.
2 Calculated after zero code error is adjusted out.
3 Sample tested at TA = 25°C to ensure compliance.
4 The glitch impulse transferred to the output of one converter (not addressed) due to a change in the digital input code to another addressed converter.
Rev. D | Page 3 of 15

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]