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MTV118 데이터 시트보기 (PDF) - Myson Century Inc

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MTV118
Myson
Myson Century Inc Myson
MTV118 Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MYSON
TECHNOLOGY
MTV118
Name
PWM3
PWM4
PWM5
PWM6
PWM7
VDD
VFLB
HTONE /
PWMCK
FBKG
BOUT
GOUT
ROUT
VSS
Pin #
I/O
N16 N24
Descriptions
Open-Drain PWM D/A Converter 3. The output pulse width is
O
- 12 programmable by the register of row 15, column 22.
O
- 13 Open-Drain PWM D/A Converter 4. The output pulse width is
programmable by the register of row 15, column 23.
O
-
14
Open-Drain PWM D/A Converter 5. The output pulse width is
programmable by the register of row 15, column 24.
O
-
15
Open-Drain PWM D/A Converter 6. The output pulse width is
programmable by the register of row 15, column 25.
O
-
16
Open-Drain PWM D/A Converter 7. The output pulse width is
programmable by the register of row 15, column 26.
Power Supply. Positive 5 V DC supply for internal circuitry and a
- 9 17 0.1uF decoupling capacitor should be connected across VDD and
VSS.
I
10
18
Vertical Input. This pin is used to input the vertical synchronizing
signal. It is triggered by lead and has an internal pull-up resistor.
Half Tone Output / PWM Clock Output. This is a multiplexed pin
O 11 19 selected by the PWMCK bit. This pin can be a PWM clock or used
to attenuate R, G, B gain of VGA for the transparent windowing
effect.
Fast Blanking Output. It is used to cut off external R, G, B sig-
O 12 20 nals of VGA while this chip is displaying characters or windows.
O 13 21 Blue Color Output. This is a blue color video signal output.
O 14 22 Green Color Output. This is a green color video signal output.
O 15 23 Red Color Output. This is a red color video signal output.
- 16 24 Ground. This ground pin is used for internal circuitry.
3.0 FUNCTIONAL DESCRIPTIONS
3.1 Serial Data Interface
The serial data interface receives data transmitted from an external controller. There are 2 types of bus
which can be accessed through the serial data interface: SPI bus and I2C bus.
3.1.1 SPI Bus
When the SSB pin is pulled to a HIGH or LOW level, the SPI bus operation is selected. A valid trans-
mission should start from pulling SSB to LOW level, enabling the MTV118 receiving mode and retaining
the LOW level until the last cycle for a complete data packet transfer. The protocol is shown in Figure 1
on page 4.
There are 3 transmission formats as shown below:
Format (a) R - C - D R - C - D R - C - D
Format (b) R - C - D C - D C - D C - D
Format (c) R - C - D D D D D D
R=row address, C=column address, D=display data
3/15
MTV118 Revision 2.0 01/01/1999

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