HT27C512 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT27C512 Datasheet PDF : 10 Pages
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HT27C512
Functional Description
Programming of the HT27C512
When the HT27C512 is delivered, the chip has
all 512K bits in the “ONE”, or HIGH state.
“ZEROs” are loaded into the HT27C512
through the procedure of programming.
The programming mode is entered when
12.2±0.2V is applied to the OE/VPP pin and CE
is at VIL. For programming, the data to be
programmed is applied with 8 bits in parallel to
the data pins.
The programming flowchart in Figure 3. shows
the fast interactive programming algorithm.
The interactive algorithm reduces program-
ming time by using 30µs to 105µs programming
pulses and giving each address only as many
pulses as is necessary in order to reliably pro-
gram the data. After each pulse is applied to a
given address, the data in that address is veri-
fied. If the data is not verified, additional pulses
are given until it is verified or until the maxi-
mum number of pulses is reached. This process
is repeated while sequencing through each ad-
dress of the HT27C512. This part of the pro-
gramming algorithm is carried at VCC=5.8V to
assure that each EPROM bit is programmed to
a sufficiently high threshold voltage. This en-
sures that all bits have sufficient margin. After
the final address is completed, the entire
EPROM memory is read at VCC=VPP=5.25±0.25V
to verify the entire memory.
Program inhibit mode
Programming of multiple HT27C512 in parallel
with different data is also easily accomplished
by using the Program Inhibit Mode. Except for
CE, all like inputs of the parallel HT27C512
may be common. A TTL low-level program pulse
applied to an HT27C512 CE input with
OE/VPP=12.2±0.2V will program that HT27C512.
A high-level CE input inhibits the other
HT27C512 from being programmed.
Program verify mode
Verification should be performed on the pro-
grammed bits to determine whether they were
correctly programmed. The verification should
be performed with OE/VPP and CE at VIL. Data
should be verified at tDV after the falling edge of
CE.
Auto product identification
The Auto Product Identification mode allows
the reading out of a binary code from an
EPROM that will identify its manufacturer and
type. This mode is intended for use by the pro-
gramming equipment for the purpose of auto-
matically matching the device to be
programmed with its corresponding program-
ming algorithm. This mode is functional in the
25°C±5°C ambient temperature range that is
required when programming the HT27C512.
To activate this mode, the programming equip-
ment must force 12.0±0.5V on the address line A9
of the HT27C512. Two identifier bytes may then
be sequenced from the device outputs by toggling
address line A0 from VIL to VIH, when A1=VIH. All
other address lines must be held at VIH during
Auto Product Identification mode.
Byte 0 (A0=VIL) represents the manufacturer
code, and byte 1 (A0=VIH), the device code. For
HT27C512, these two identifier bytes are shown
in the Operation mode truth table. All identifiers
for the manufacturer and device codes will pos-
sess odd parity, with the MSB (DQ7) defined as
the parity bit. When A1=VIL, the HT27C512 will
read out the binary code of 7F, continuation code,
to signify the unavailability of manufacturer ID
codes.
Read mode
The HT27C512 has two control functions, both
of which must be logically satisfied in order to
obtain data at outputs. Chip Enable (CE) is the
power control and should be used for device
selection. Output Enable (OE) is the output
control and should be used to gate data to the
output pins, independent of device selection.
Assuming that addresses are stable, address
access time (tACC) is equal to the delay from CE
to output (tCE). Data is available at the outputs
(tOE) after the falling edge of OE, assuming the
CE has been LOW and addresses have been
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6th May ’99
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