TDA4510/V9 데이터 시트보기 (PDF) - Philips Electronics

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TDA4510/V9

PAL decoder

Philips Electronics 

Philips Semiconductors

PAL decoder

Product specification

TDA3561A

APPLICATION INFORMATION

The function is described against the corresponding pin

number.

1. + 12 V power supply

The circuit gives good operation in a supply voltage range

between 8 and 13,2 V provided that the supply voltage for

the controls is equal to the supply voltage for the

TDA3561A. All signal and control levels have a linear

dependency on the supply voltage. The current taken by

the device at 12 V is typically 85 mA. It is linearly

dependent on the supply voltage.

2. Control voltage for identification

This pin requires a detection capacitor of about 330 nF for

correct operation. The voltages available under various

signal conditions are given in the specification.

3. Chrominance input

The chroma signal must be a.c.-coupled to the input.

Its amplitude must be between 55 mV and 1100 mV

peak-to-peak (25 mV to 500 mV peak-to-peak burst

signal). All figures for the chroma signals are based on a

colour bar signal with 75% saturation, that is the

burst-to-chroma ratio of the input signal is 1 : 2,25.

4. Reference voltage A.C.C. detector

This pin must be decoupled by a capacitor of about 330

nF. The voltage at this pin is 4,9 V.

5. Control voltage A.C.C.

The A.C.C. is obtained by synchronous detection of the

burst signal followed by a peak detector. A good noise

immunity is obtained in this way and an increase of the

colour for weak input signals is prevented. The

recommended capacitor value at this pin is 2,2 µF.

6. Saturation control

The saturation control range is in excess of 50 dB.

The control voltage range is 2 to 4 V. Saturation control is

a linear function of the control voltage.

When the colour killer is active, the saturation control

voltage is reduced to a low level if the resistance of the

external saturation control network is sufficiently high.

Then the chroma amplifier supplies no signal to the

demodulator. Colour switch-on can be delayed by proper

choice of the time constant for the saturation control

setting circuit.

When the saturation control pin is connected to the power

supply the colour killer circuit is overruled so that the colour

signal is visible on the screen. In this way it is possible to

adjust the oscillator frequency without using a frequency

counter (see also pins 25 and 26).

7. Contrast control

The contrast control range is 20 dB for a control voltage

change from + 2 to + 4 V. Contrast control is a linear

function of the control voltage. The output signal is

suppressed when the control voltage is 1 V or less. If one

or more output signals surpasses the level of 9 V the peak

white limiter circuit becomes active and reduces the output

signals via the contrast control by discharging C2 via an

internal current sink.

8. Sandcastle and field blanking input

The output signals are blanked if the amplitude of the input

pulse is between 2 and 6,5 V. The burst gate and clamping

circuits are activated if the input pulse exceeds a level of

7,5 V.

The higher part of the sandcastle pulse should start just

after the sync pulse to prevent clamping of video signal on

the sync pulse. The width should be about 4 µs for proper

A.C.C. operation.

9. Video-data switching

The insertion circuit is activated by means of this input by

an input pulse between 1 V and 2 V. In that condition, the

internal RGB signals are switched off and the inserted

signals are supplied to the output amplifiers. If only normal

operation is wanted this pin should be connected to the

negative supply. The switching times are very short

(< 20 ns) to avoid coloured edges of the inserted signals

on the screen.

10. Luminance signal input

The input signal should have a peak-to-peak amplitude of

0,45 V (peak white to sync) to obtain a black-white output

signal to 5 V at nominal contrast. It must be a.c.-coupled to

the input by a capacitor of about 22 nF. The signal is

clamped at the input to an internal reference voltage.

A 1 kΩ luminance delay line can be applied because the

luminance input impedance is made very high.

Consequently the charging and discharging currents of the

coupling capacitor are very small and do not influence the

signal level at the input noticeably. Additionally the

coupling capacitor value may be small.

September 1982

11

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