AD1848 데이터 시트보기 (PDF) - Analog Devices
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AD1848 Datasheet PDF : 28 Pages
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AD1848K
TIMING PARAMETERS (GUARANTEED OVER OPERATING TEMPERATURE RANGE AND V DD = VCC = 5.0 V ؎5%)
Min
Max
Units
WR/RD Strobe Width (tSTW)
WR/RD Rising to WR/RD Falling (tBWND)
Write Data Setup to WR Rising (tWDSU)
RD Falling to Valid Read Data (tRDDV)
CS Setup to WR/RD Falling (tCSSU)
CS Hold from WR/RD Rising (tCSHD)
Adr Setup to WR/RD Falling (tADSU)
Adr Hold from WR/RD Rising (tADHD)
DAK Rising to WR/RD Falling (tSUDK1)
DAK Falling to WR/RD Rising (tSUDK2)
DAK Setup to WR/RD Falling (tDKSU)
Data Hold from RD Rising (tDHD1)
Data Hold from WR Rising (tDHD2)
DRQ Hold from WR/RD Falling (tDRHD)
DAK Hold from WR Rising (tDKHDa)
DAK Hold from RD Rising (tDKHDb)
DBEN/DBDIR delay from WR/RD Falling (tDBDL)
110
ns
110
ns
22
ns
30
70
ns
10
ns
0
ns
10
ns
10
ns
60
ns
0
ns
25
ns
0
20
ns
15
ns
0
25
ns
50
ns
50
ns
0
30
ns
POWER SUPPLY
Power Supply Range – Analog
Power Supply Range – 5 V Digital
Power Supply Current – 5 V Operating
(5 V Supplies, 10 kΩ Load)
Analog Supply Current – 5 V Operating (10 kΩ Load)
Digital Supply Current – 5 V Operating (10 kΩ Load)
Digital Power Supply Current – Power Down
Analog Power Supply Current – Power Down
Power Dissipation – 5 V Operating
(Current • Nominal Supplies)
Power Dissipation – Power Down
(Current • Nominal Supplies)
Power Supply Rejection (100 mV p-p Signal @ 1 kHz)*
(At Both Analog and Digital Supply Pins, Both ADCs
and DACs)
Min
Max
4.75
5.25
4.75
5.25
120
65
55
1
1
600
10
40
Units
V
V
mA
mA
mA
mA
mA
mW
mW
dB FS
CLOCK SPECIFICATIONS*
Input Clock Frequency
Recommended Clock Duty Cycle Tolerance
Initialization Time
16.9344 MHz Crystal Selected
24.576 MHz Crystal Selected
*Guaranteed, not tested
Specifications subject to change without notice.
Min
Max
27
± 10
70
90
Units
MHz
%
ms
ms
REV. 0
–5–
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