UCB1500 데이터 시트보기 (PDF) - Philips Electronics

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UCB1500

PCI to AC97 bridge/host controller

Philips Electronics 

Philips Semiconductors

UCB1500

PCI to AC97 bridge/host controller

[0F]: BIST (read only): Always 0; no built-in test capability.

[10]: I/O port base address

Table 8: I/O Port Base Address register bit description

Bit

Description

31-16(r) I/O port Base address

A[31:16] always 0.

15-4

I/O port Base address

A[15:4]; programmable address space for control registers.

3-1

Always 000b

0

Always 1b

[2C-2F] Subsystem ID/Subsystem Vendor ID (read only): Programmable through

EEPROM interface or through register 6e-6ch. Default Value = 3400h/1131h.

[34] Capability pointer (read only): 80h points to start offset of power management

registers.

[3C]: Interrupt Register

Table 9:

Bit

15:8

7:0

Interrupt Register bit description

Description

Interrupt pin (read only)

Always 01h; interrupt pin connected to INTA.

Interrupt line

Interrupt line routing information.

[40-43] Device ID Write / Vendor ID Write: This register contains a copy of the

Device ID and Vendor ID registers. Writing to this register will update the original

Device ID and Vendor ID registers (offset 0h - 3h).

[44h]: Revision ID: Same as offset 08h.

[45-47] Class code Write: This register contains a copy of the Class Code registers.

Writing to this register will update the original Class Code registers (offset 9h-Bh).

[48]: EEPROM status register /Misc

Table 10: EEPROM Status register bit description

Bit

Description

0

EEPROM autoload status

If set, EEPROM autoload cycle is in progress.

9397 750 06854

Objective specification

Rev. 01 — 4 February 2000

© Philips Electronics N.V. 2000. All rights reserved.

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