MC14568BD 데이터 시트보기 (PDF) - Motorola => Freescale
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MC14568BD Datasheet PDF : 12 Pages
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Typical Maximum Frequency Divider D1
Division ratios: 4, 64 or 100 (CL = 50 pF)
28
26
24
22
20
VDD = 15 V
18
16
14
12
VDD = 10 V
10
8
6
VDD = 5 V
4
2
0
– 40 – 20
0
+ 20 + 40 + 60
T, TEMPERATURE (°C)
+ 80 + 100
Typical Maximum Frequency Divider D1
Division ratio: 16 (CL = 50 pF)
12
10
8
VDD = 15 V
6
VDD = 10 V
4
2
VDD = 5 V
0
– 40 – 20
0
+ 20 + 40 + 60
T, TEMPERATURE (°C)
+ 80 + 100
Typical Maximum Frequency Divider D2
Division ratio: 2 (CL = 50 pF)
6
5
4
VDD = 15 V
3
VDD = 10 V
2
1
VDD = 5 V
0
– 40 – 20
0
+ 20 + 40 + 60
T, TEMPERATURE (°C)
+ 80 + 100
MC14568B
6
MOTOROLA CMOS LOGIC DATA
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