SP574B 데이터 시트보기 (PDF) - Signal Processing Technologies

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SP574B

12–Bit Sampling A/D Converters

Signal Processing Technologies 

CONVERT MODE TIMING

CE

tSSC

CS

R/C tSRC

A0

tSAC

STS

DB11–

DB0

tHEC

tHRC

tHAC

tDSC

tC

HIGH IMPEDANCE

CHARACTERISTICS

Typical @ 25˚C, VCC = +15V or +10V, VLOGIC = +5V, VEE = 0V, unless otherwise specified.

PARAMETER

tDSC STS Delay from CE

tHEC CE Pulse Width

tSSC CS to CE Setup

tHSC CS Low during CE High

tSRC R/C to CE Setup

tHRC R/C Low during CE High

tSAC A0 to CE Setup

tHAC A0 Valid during CE High

tC Conversion Time1, 3, 4

MIN. TYP. MAX.

200

50

50

50

50

50

0

50

See specifications

NOTES:

1. Parameters guaranteed by design and sample tested.

2. Parameters 100% tested @ 25˚C on special orders.

3. 100% tested.

4.

TMIN to TMAX.

Figure 6. Convert Mode Timing

UNITS

ns

ns

ns

ns

ns

ns

ns

ns

CONDITIONS

SP574B/674B/1674B/774B

12–Bit Sampling A/D Converters

11

© Copyright 2000 Sipex Corporation

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