AD7243BN 데이터 시트보기 (PDF) - Analog Devices
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AD7243BN Datasheet PDF : 13 Pages
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AD7243–SPECIFICATIONS (VDD = +12 V to +15 V,1 VSS = 0 V or –12 V to –15 V,1 AGND = DGND = O V, REFIN = +5 V,
RL = 2 k⍀, CL = 100 pF to AGND. All Specifications TMIN to TMAX unless otherwise noted.)
Parameter
A2
STATIC PERFORMANCE
Resolution
12
Relative Accuracy3
±1
Differential Nonlinearity3
± 0.9
Unipolar Offset Error3
±4
Bipolar Zero Error3
±5
Full-Scale Error3, 4
±6
Full-Scale Temperature Coefficient5 ± 5
B2
12
± 1/2
± 0.9
±4
±5
±6
±5
S2
12
±1
± 0.9
±5
±6
±7
±5
Unit
Test Conditions/Comments
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
ppm of FSR/
°C typ
Guaranteed Monotonic
VSS = 0 V or –12 V to –15 V1; DAC Latch
Contents All 0s
VSS = –12 V to –15 V1; DAC Latch Contents All 0s
Guaranteed By Process
REFERENCE OUTPUT
Reference Output Range, REFOUT
Reference Temperature Coefficient5
Reference Load Change
(∆REFOUT VS. IL)
REFERENCE INPUT
Reference Input Range, REFIN
Input Current
4.95/5.05
± 25
–1
4.95/5.05
5
4.95/5.05
± 25
–1
4.95/5.05
5
4.95/5.05
± 30
–1
4.95/5.05
5
V min/V max
ppm/°C typ Guaranteed By Process
mV max
Reference Load Current (IL) Change (0–100 µA)
V min/V max 5 V ± 1% for Specified Performance
µA max
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance5
2.4
2.4
2.4
0.8
0.8
0.8
±1
±1
±1
8
8
8
V min
V max
µA max
pF max
VIN = 0 V to VDD
DIGITAL OUTPUT
Serial Data Out (SDO)
Output Low Voltage, VOL
Output High Voltage, VOH
ANALOG OUTPUT
Output Range Resistor, ROFS
Output Voltage Ranges6
Output Voltage Ranges6
DC Output Impedance5
AC CHARACTERISTICS5
Voltage Output Settling-Time
Positive Full-Scale Change
Negative Full-Scale Change
Digital-to-Analog Glitch Impulse3
Digital Feedthrough3
0.4
0.4
0.4
4.0
4.0
4.0
15/30
+5, +10
+5, +10, ±5
0.5
15/30
+5, +10
+5, +10, ± 5
0.5
15/30
+5, +10
+5, +10, ± 5
0.5
10
10
10
10
10
10
30
30
30
10
10
10
V max
V min
ISINK = 1.6 mA
ISOURCE = 400 µA
kΩ min/max
V
V
Ω typ
Typically 20 k⍀. Guaranteed By Process
Single Supply; VSS = 0 V
Dual Supply; VSS = –12 V to –15 V
µs max
µs max
nV secs typ
nV secs typ
Settling Time to Within ± 1/2 LSB of Final Value
Typically 4 µs
Typically 5 µs
DAC Latch Contents Toggled Between All 0s
and All 1s
LDAC = High
POWER REQUIREMENTS
VDD Range
VSS Range (Dual Supplies)
IDD
ISS (Dual Supplies)
+10.8/+16.5
–10.8/–16.5
10
2
+10.8/+16.5
–10.8/–16.5
10
2
+11.4/+15.75
–11.4/–15.75
10
2
V min/V max
V min/V max
mA max
mA max
For Specified Performance Unless Otherwise Stated
For Specified Performance Unless Otherwise Stated
Output Unloaded; Typically 7 mA
Output Unloaded; Typically 1 mA
NOTES
1Power Supply Tolerance A, B Versions: ± 10%; S Version: ± 5%.
2Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C.
3See terminology.
4Measured with respect to REFIN and includes unipolar/bipolar offset error.
5Guaranteed by design and characterization, not production tested.
60 V to +10 V output range is available only with VDD ≥ +14.25 V.
Specifications subject to change without notice.
–2–
REV. A
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