CXA2067AS 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA2067AS

Preamplifier for High-Resolution Computer Display

Sony Semiconductor 

CXA2067AS

Definitions of I2C Bus Register

Slave Address

SLAVE RECEIVER : 40 (HEX)

Register Table

SUB ADDRESS BIT7

BIT6

00h

01h

0 BLK MODE

02h

03h

04h

05h

VDET LEVEL

06h

07h

08h

09h

0Ah

VDET OFF SVSW

BIT5

∗

BIT4

BIT3

BIT2

CONTRAST

BRIGHTNESS

CUT OFF R

CUT OFF G

CUT OFF B

OSD GAIN

CUT OFF RGB

SUB CONTRAST R

SUB CONTRAST G

SUB CONTRAST B

∗

∗

∗

BIT1

BIT0

∗

VSOFF

Note) ∗: don’t care

Sub Address CONTRAST (8):

0000

Performs the gain control for R, G and B channels in common.

Control is performed by the multiplication with SUB CONTRAST. The white

balance is adjusted by SUB CONTRAST and the luminance is adjusted by

CONTRAST.

0 : Gain minimum (–30 dB or less)

255 : Gain maximum (+17 dB)

Sub Address BLK MODE (1):

0001

Switches the blanking level.

0 : Pedestal–0.3 V

1 : 0.3 V fixed

Sub Address BRIGHTNESS (6): Performs the black level control for R, G and B channels in common.

0001

0 : Black level minimum (0.9 V)

63 : Black level maximum (2.8 V)

Sub Address CUT OFF R (8):

0010

Performs the Pin 3 (COF R) output voltage control.

0 : Output voltage minimum (1 V)

255 : Output voltage maximum (4 V)

Sub Address CUT OFF G (8):

0011

Performs the Pin 4 (COF G) output voltage control.

0 : Output voltage minimum (1 V)

255 : Output voltage maximum (4 V)

Sub Address CUT OFF B (8):

0100

Performs the Pin 5 (COF B) output voltage control.

0 : Output voltage minimum (1 V)

255 : Output voltage maximum (4 V)

—7—

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