PS395 데이터 시트보기 (PDF) - Pericom Semiconductor
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PS395 Datasheet PDF : 13 Pages
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PS395
Precision 8-Ch. 17V, SPST Switch
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Timing Characteristics - Dual Supplies
(V± = ±4.5V to 5.5V, V = 4/5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C).
Parameter
Symbol
Conditions
Min.(1) Typ.(1) Max.(1) Units
Serial Digital Interface
SCLK Frequency
Cycle Time
CS Lead Time
fSCLK
tCH + tCL
tCSS
0
2.1 MHz
480
240
CS Lag Time
SCLK High Time
SCLK Low Time
Data Setup Time
Data Hold Time
tCSH2
tCH
tCL
tDS
tDH
240
C, E
190
190
ns
200
17
0
17
DIN Data Valid after Falling SCLK(4)
Rise Time of DOUT(4)
Allowable Rise Time at DIN, SCLK(4)
Fall Time of DOUT(4)
Allowable Fall Time at DIN, SCLK(4)
RESET Minimum Pulse Width
tDO
50% of SCLK to 10% of DOUT,
CL = 10pF
TA = +25V
C, E
tDR
tSCR
tDF
20% of V+ to 70% of V+, CL = 10pF
tSCF
tRW
85
400
100
2
ns
100
µs
2
ns
70
Notes:
1. The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
2. ∆RON = RON(MAX) - RON(MIN). On-resistance match between channels and on-resistance flatness are guaranteed only with
specified voltages. Flatness is defined as the difference between the maximum and minimum value of on-resistance as
measured over the specified analog signal range.
3. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at room temp.
4. Guaranteed by design.
5. Leakage testing at single supply is guaranteed by testing with dual supplies.
6. See Figure 5. Off isolation = 20log10 VCOM/VNO, VCOM = output. NO = input to off switch.
7. Between any two switches. See Figure 2.
5
PS8462 02/22/00
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