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PS395 데이터 시트보기 (PDF) - Pericom Semiconductor

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PS395 Datasheet PDF : 13 Pages
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PS395
Precision 8-Ch. 17V, SPST Switch
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Timing Characteristics - Single +5V Supply
(V+ = ±4.5V to 5.5V, V– = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are TA = +25°C).
Parameter
Symbol
Conditions
Min.(1) Typ.(1) Max.(1) Units
Serial Digital Interface
SCLK Frequency
Cycle Time(4)
CS Lead Time(4)
CS Lag Time(4)
SCLK High Time(4)
SCLK Low Time(4)
Data Setup Time(4)
Data Hold Time(4)
fSCLK
tCH + tCL
tCSS
tCSH2
tCH
tCL
tDS
tDH
0
2.1 MHz
480
240
240
C, E
190
190
ns
200
17
0
–17
DIN Data Valid after Falling SCLK(4)
tDO
50% of SCLK to 10% of DOUT, TA = +25V
CL = 10pF
C, E
85
400
Rise Time of DOUT(4)
Allowable Rise Time at DIN, SCLK(4)
Fall Time of DOUT(4)
tDR
tSCR 20% of V+ to 70% of V+,
tDF CL = 10pF
100
2
ns
100
µs
Allowable Fall Time at DIN, SCLK(4)
tSCF
RESET Minimum Pulse Width
tRW
2
ns
70
Notes:
1. The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
2. RON = RON(MAX) - RON(MIN). On-resistance match between channels and on-resistance flatness are guaranteed only with
specified voltages. Flatness is defined as the difference between the maximum and minimum value of on-resistance as
measured over the specified analog signal range.
3. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at room temp.
4. Guaranteed by design.
5. Leakage testing at single supply is guaranteed by testing with dual supplies.
6. See Figure 5. Off isolation = 20log10 VCOM/VNO, VCOM = output. NO = input to off switch.
7. Between any two switches. See Figure 2.
7
PS8462 02/22/00

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