74HCT192N 데이터 시트보기 (PDF) - Philips Electronics

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74HCT192N

Presettable synchronous BCD decade up/down counter

Philips Electronics 

Philips Semiconductors

Presettable synchronous BCD decade

up/down counter

Product specification

74HC/HCT192

(1) Clear overrides load, data and count inputs.

(2) When counting up the count down clock input

(CPD) must be HIGH, when counting down the

count up clock input (CPU) must be HIGH.

Sequence

Clear (reset outputs to zero);

load (preset) to BCD seven;

count up to eight, nine,

terminal count up, zero,

one and two;

count down to one, zero,

terminal count down, nine,

eight, and seven.

Fig.5 Typical clear, load and count sequence.

December 1990

Fig.6 Logic diagram.

6

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