74F298 데이터 시트보기 (PDF) - Philips Electronics
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74F298 Datasheet PDF : 8 Pages
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Philips Semiconductors
Quad 2-input multiplexer with storage
Product specification
74F298
FEATURES
• Fully synchronous operation
• Select from two data sources
• Buffered, negative edge triggered clock
• Provides the equivalent of function capabilities of two separate
MSI functions (74F157 and 74F175)
DESCRIPTION
The 74F298 is a high speed Quad 2-Input Multiplexer with storage.
It selects 4 bits of data from two sources (ports) under the control of
a common Select input (S). The selected data is transferred to the
4-bit output register synchronous with the High-to-Low transition of
the clock (CP). The 4-bit register is fully edge triggered. The data
inputs (I0 and I1) and Select input (S) must be stable only one setup
time prior to the High-to-Low transition of the clock for predictable
operation.
PIN CONFIGURATION
I1b 1
I1a 2
I0a 3
I0b 4
I1c 5
I1d 6
I0d 7
GND 8
16 VCC
15 Qa
14 Qb
13 Qc
12 Qd
11 CP
10 S
9 I0c
SF00859
TYPE
74F298
TYPICAL fMAX
115MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
30mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
16-pin plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
N74F298N
16-pin plastic SO
N74F298D
PKG DWG #
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
I0a, I0b, I0c, I0d
Data inputs
1.0/1.0
I1a, I1b, I1c, I1d
Data inputs
1.0/1.0
S
Select input
1.0/1.0
CP
Clock input (active falling edge)
1.0/1.0
Qa, Qb, Qc, Qd
Data outputs
50/33
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
32419576
11
C1
10
M2
I0a I1a I0b I1b I0c I1c I0d I1d
10
S
11
CP
Qa Qb Qc Qd
VCC = Pin 16
GND = Pin 8
15 14 13 12
SF00860
3
2, 1D
2
2, 1D
4
1
9
5
7
6
15
14
13
12
SF00861
1989 Aug 14
2
853–0061 97377
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