ADG212AKR 데이터 시트보기 (PDF) - Analog Devices

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ADG212AKR

LC2MOS Quad SPST Switches

Analog Devices 

Data Sheet

TERMINOLOGY

RON

Ohmic resistance between the out and S terminals.

RON Match

Difference between the RON of any two channels.

IS (Off)

Source terminal leakage current when the switch is off.

ID (Off)

Drain terminal leakage current when the switch is off.

ID (On)

Leakage current that flows from the closed switch into the body.

VD (VS)

Analog voltage on the D, S terminals.

CS (Off)

Switch input capacitance off condition.

CD (Off)

Switch output capacitance off condition.

CIN

Digital input capacitance.

CD, CS (On)

Input or output capacitance when the switch is on.

tON

Delay time between the 50% and 90% points of the digital input

and switch on condition.

ADG211A/ADG212A

tOFF

Delay time between the 50% and 90% points of the digital input

and switch off condition.

tOPEN

Off time measured between 50% points of both switches, which

are connected as a multiplexer when switching from one

address state to another.

VINL

Maximum input voltage for a logic low.

VINH

Minimum input voltage for a logic high.

IINL (IINH)

Input current of the digital input.

VDD

Most positive voltage supply.

VSS

Most negative voltage supply.

VL

Logic supply voltage.

IDD

Positive supply current.

ISS

Negative supply current.

Rev. C | Page 9 of 16

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