5962F9670601VEC 데이터 시트보기 (PDF) - Intersil

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5962F9670601VEC

Radiation Hardened 4-Bit Synchronous Counter

Intersil 

Functional Diagram

SPE

CP

P0

MR

P1

ACS161MS

JQ

Q0

CP

K QN

CD

JQ

Q1

CP

K QN

CD

JQ

Q2

CP

K QN

P2

CD

JQ

Q3

CP

K QN

P3

CD

PE

TC

TE

TRUTH TABLE

INPUTS

OUTPUTS

OPERATING MODE

MR

CP

PE

TE

SPE

PN

QN

TC

Reset (Clear)

L

X

X

X

X

X

L

L

Parallel Load

H

X

X

I

I

L

L

H

X

X

I

h

H

(Note 1)

Count

H

h

h

h (Note 3)

X

count

(Note 1)

Inhibit

H

X

I (Note 2)

X

h (Note 3)

X

qN

(Note 1)

H

X

X

I (Note 2) h (Note 3)

X

qN

L

H = High Steady State, L = Low Steady State, h = High voltage level one setup time prior to the Low-to-High clock transition, I = Low volt-

age level one setup time prior to the Low-to-High clock transition, X = Don’t Care,q = Lower case letters indicate the state of the referenced

output prior to the Low-to-High clock transition,

= Low-to-High Transition.

NOTES:

1. The TC output is High when TE is High and the counter is at Terminal Count (HHHH).

2. The High-to-Low transition of PE or TE should only occur while ZCP is High for conventional operation.

3. The Low-to-High transition of SPE should only occur while CP is High for conventional operation.

4. The TC output is High when TE is High and the counter is at Terminal Count (HHHH).

Spec Number 518818

2

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