HCTS112KMSR 데이터 시트보기 (PDF) - Intersil

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HCTS112KMSR

Radiation Hardened Dual JK Flip-Flop

Intersil 

AC Timing Diagrams

VIH

VIL

VOH

VOL

VOH

VOL

VS

INPUT

TPLH

VS

TPHL

OUTPUT

TTLH

20%

80% 80%

OUTPUT

HCTS112MS

TTHL

20%

AC VOLTAGE LEVELS

PARAMETER

HCTS

VCC

4.50

VIH

3.00

VS

1.30

VIL

0

GND

0

UNITS

V

V

V

V

V

Pulse Width, Setup, Hold Timing Diagram

Positive Edge Trigger

INPUT

VIH

VS

VIL

TSU

INPUT CP

VIH

VS

VIL

TH = HOLD TIME

TSU = SETUP TIME

TW = PULSE WIDTH

TW

TH

TW

PARAMETER

VCC

VIH

VS

VIL

GND

VOLTAGE LEVELS

HCTS

4.50

3.00

1.30

0

0

AC Load Circuit

DUT

CL

TEST

POINT

RL

UNITS

V

V

V

V

V

CL = 50pF

RL = 500Ω

Spec Number 518603

497

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