MC68HC68 데이터 시트보기 (PDF) - Motorola => Freescale

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MC68HC68

Real-Time Clock plus RAM with Serial Interface

Motorola => Freescale 

VDD

XTALin

XTALout

INT

IRQ

VDD

VDD

0V

LINE

REAL–TIME CLOCK

MSB

MC68HC68T1 LSB

1

(STATUS REGISTER)

NOTE: A 60 Hz, 10 V p–p sine–wave voltage is an acceptable signal to present at the LINE input pin.

Figure 8. Power Sensing Functional Diagram

MC68HC05C4

CPU

TO SYSTEM

POWER CONTROL

MSB

1

INTERRUPT

CONTROL

REGISTER

PSE

LSB

CLKOUT

CPUR

VSYS

SERIAL

INTERFACE

REAL–TIME CLOCK

MC68HC68T1

OSC 1

VDD

RESET

VBATT

MISO

MOSI

MC68HC05C4

CPU

Figure 9. Software Power–Down Functional Diagram

MOTOROLA

MC68HC68T1

11

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