CT1999 데이터 시트보기 (PDF) - Aeroflex Corporation
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CT1999 Datasheet PDF : 25 Pages
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Transmit Data
The signals generated by the encoder chip (PDOUT & NDOUT) are of the same format as the receive data The only
difference is that the TTL signals are negative logic, e.g. the signal is active when on logic level "0". This means that
when the encoder is quiet both PDOUT & NDOUT are at logic level ‘1’. Both the signals should be used in conjunction
with TXEN and the appropriate driver enable, e.g. (CS0 - enable for bus 0). TXEN only enables the driver when it
should be transmitting, and the driver enable routes the data on to the bus in use.
Figure 5 shows an example of a typical interface circuit between the CT1999 and a driver/receiver unit.
BUS CONTROL OPERATION
To enable its use in a bus controller each chip in the chipset has additional logic within it. This logic can be enabled by
pulling the pin labelled RT/BC low. Once the chipset is in bus control mode, all data transfers must be initiated by the
bus control processor correctly commanding the chipset via the subsystem interface. In bus control mode six inputs are
activated which in RT mode are inoperative and four signals with dual functions exercise the second function (the first
being for the RT operation).
To use the CT1999 as a 1553B bus control interface, the bus control processor must be able to carry out four basic
bus-related functions. Two inputs, BCOPA and BCOPB allow these four options to be selected. The option is then
initiated by sending a negative-going strobe on the BCOPSTB input. BCOPSTB must only be strobed low when NDRQ
is high. This is particularly important when two options are required during a single transfer.
With these options all message types and lengths can be handled. Normal BC/RT exchanges are carried out in the
chipset option zero. This is selected by setting BCOPA and BCOPB to a zero and strobing BCOPSTB. On receipt of the
strobe, the CT1999 loads the command word from an external latch using CWEN and H/L The command word is
transmitted down the bus. The TX/RX bit is, however, considered by the chipset as being its inverse and so if a transmit
command is sent to a RT, Figure 17, the chipset in BC mode believes it has been given a receive command. As the RT
returns the requested number of data words plus its status, the BC chipset carries out a full validation check and
passes the data into the subsystem using DTRQ, DTAK, H/L, IUSTB and CWC as in RT operation. It also supplies
GBR at the end of a valid transmission. Conversely, a receive command sent down the bus is interpreted by the BC
chipset as a transmit command, and so the requisite data words are added to the command word, see Figure 18.
For mode commands, where a single command word is required, option one is selected by strobing BCOPSTB when
BCOPA is high and BCOPB is low. On receiving the strobe, the command word is loaded from the external latch using
CWEN and H/L, the correct sync and parity bits are added and the word transmitted, see Figure 20. Mode commands
followed by a data word requires option two. Option two, selected by strobing BCOPSTB while BCOPA is low and
BCOPB is high, loads a data word via DWEN and H/L, adds sync and parity and transmits them to the bus, see Figure
21. If the mode code transmitted required the RT to return a data word, then selecting option three by strobing
BCOPSTB when BCOPA and BCOPB are both high will identify that data word and if validated, output it to the
subsystem interface using RMDSTB and H/L This allows data words resulting from mode codes to be identified
differently from ordinary data words and routed accordingly, see Figure 22. All received status words are output to the
subsystem interface using STATSTB and H/L.
In BC option three, if the signal PASMON is active, then all data appearing on the selected bus is output to the
subsystem using STATSTB for command and status words or RMDSTB for data words.
RT to RT transfers require the transmission of two command words. A receive command to one RT is contiguously
followed by a transmit command to the the other RT. This can be achieved by selecting option one followed by option
zero for the second command. The strobe (BCOPSTB) for option zero must be delayed until NDRQ has gone low and
returned high following the strobe for option one. The RT transmissions are checked and transferred in the subsystem
interface to the bus control processor, see Figure 19.
Note: For all BC operations, BCOPA and BCOPB must remain valid and stable for a minimum of 1 µs following the
leading (negative going) edge of BCOPSTB.
Aeroflex Circuit Technology
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SCDCT1999 REV B 8/14/01 Plainview NY (516) 694-6700
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