IS42S16128-8T 데이터 시트보기 (PDF) - Integrated Silicon Solution
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IS42S16128-8T
Integrated Silicon Solution
IS42S16128-8T Datasheet PDF : 75 Pages
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IS42S16128
ISSI ®
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
Symbol
—
—
tCAC
tRCD
tRAC
tRC
tRAS
tRP
tRRD
tCCD
tDPL
tDAL
tRBD
tWBD
tRQL
tWDL
tPQL
tQMD
tDMD
tMCD
Parameter
-8
Min. Typ. Max.
Clock Cycle Time
8 10 25
Operating Frequency
CAS Latency
125 100 40
321
Active Command To Read/Write Command Delay Time 3 2 1
RAS Latency (tRCD + tCAC)
642
Command Period (REF to REF / ACT to ACT)
952
Command Period (ACT to PRE)
631
Command Period (PRE to ACT)
321
Command Period (ACT[0] to ACT [1])
321
Column Command Delay Time
(READ, READA, WRIT, WRITA)
111
Input Data To Precharge Command Delay Time
111
Input Data To Active/Refresh Command Delay Time
(During Auto-Precharge)
432
Burst Stop Command To Output in HIGH-Z Delay Time 3 2 1
(Read)
Burst Stop Command To Input in Invalid Delay Time 0 0 0
(Write)
Precharge Command To Output in HIGH-Z Delay Time 3 2 1
(Read)
Precharge Command To Input in Invalid Delay Time
(Write)
000
Last Output To Auto-Precharge Start Time (Read)
–2 –1 0
DQM To Output Delay Time (Read)
222
DQM To Input Delay Time (Write)
000
Mode Register Set To Command Delay Time
222
-10
Min. Typ. Max.
10 15 30
100 65 33
321
321
642
963
642
321
321
111
111
432
321
000
321
000
–2 –1 0
222
000
222
-12
Min. Typ. Max. Units
12 17 34 ns
83 58 29 MHz
3 2 1 cycle
3 2 1 cycle
6 4 2 cycle
9 7 4 cycle
6 5 3 cycle
3 2 1 cycle
3 2 1 cycle
1 1 1 cycle
1 1 1 cycle
4 3 2 cycle
3 2 1 cycle
0 0 0 cycle
3 2 1 cycle
0 0 0 cycle
–2 –1 0 cycle
2 2 2 cycle
0 0 0 cycle
2 2 2 cycle
AC TEST CONDITIONS (Input/Output Reference Level: 1.4V)
Input
2.0V
CLK 1.4V
0.8V
2.0V
INPUT 1.4V
0.8V
OUTPUT
tCK
tCHI
tCL
tCS
tCH
tAC
tOH
1.4V
1.4V
Output Load
500 Ω
I/O
+1.4V
50 pF
Integrated Silicon Solution, Inc. — 1-800-379-4774
7
Rev. A
03/13/00
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