SUPPLY CURRENTS
Parameter
Symbol
Min
Typ
Max
Unit Notes
Input Leakage Current (0 V ≤ Vin ≤ VDD)
Ilkg(I)
—
Output Leakage Current (0 V ≤ Vin ≤ VDDQ)
Ilkg(O)
—
AC Supply Current (Device Selected,
All Outputs Open, Freq = Max)
Includes VDD Only
MCM63F733A–10 IDDA
—
MCM63F733A–11
CMOS Standby Supply Current (Device Deselected, Freq = 0,
ISB2
—
VDD = Max, All Inputs Static at CMOS Levels)
Sleep Mode Supply Current (Sleep Mode, Freq = Max,
VDD = Max, All Other Inputs Static at CMOS Levels,
ZZ ≥ VDD – 0.2 V)
IZZ
—
TTL Standby Supply Current (Device Deselected, Freq = 0,
VDD = Max, All Inputs Static at TTL Levels)
ISB3
—
—
±1
µA
1, 2
—
±1
µA
—
TBD
mA 3, 4, 5
—
TBD
mA
6, 8
—
2
mA 2, 7, 8
—
TBD
mA
6, 9
Clock Running (Device Deselected,
Freq = Max, VDD = Max, All Inputs
Toggling at CMOS Levels)
MCM63F733A–10 ISB4
—
MCM63F733A–11
—
TBD
mA 3, 4,
5, 6, 8
Static Clock Running (Device Deselected,
MCM63F733A–10 ISB5
—
Freq = Max, VDD = Max, All Inputs
MCM63F733A–11
Static at TTL Levels)
—
TBD
mA
6, 9
NOTES:
1. LBO pin has an internal pullup and will exhibit leakage currents of ± 5 µA.
2. ZZ pin has an internal pulldown and will exhibit leakage currents of ± 5 µA.
3. Reference AC Operating Conditions and Characteristics for input and timing.
4. All addresses transition simultaneously low (LSB) then high (MSB).
5. Data states are all zero.
6. Device is deselected as defined by the Truth Table.
7. Device in Sleep Mode as defined by the Asynchronous Truth Table.
8. CMOS levels for I/Os are VIT ≤ VSS + 0.2 V or ≥ VDDQ – 0.2 V. CMOS levels for other inputs are Vin ≤ VSS + 0.2 V or ≥ VDD – 0.2 V.
9. TTL levels for I/Os are VIT ≤ VIL or ≥ VIH2. TTL levels for other inputs are Vin ≤ VIL or ≥ VIH.
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 0 to 70°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Min
Typ
Input Capacitance
Cin
—
4
Input/Output Capacitance
CI/O
—
7
Max
Unit
5
pF
8
pF
MCM63F733A
8
MOTOROLA FAST SRAM