CXA1390AQ 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA1390AQ

S/H and AGC for CCD Camera

Sony Semiconductor 

CXA1390AQ/AR

PIn

No.

Symbol

8 CS CCD SL

Voltage

Equivalent circuit

9 CS CCD GC

11 CSAGC GC

8

9

12 CSAGC SL

11

12

130

21

(Test mode at 0V)

IRIS LEVEL

21

22

25

22 IRIS GC

31

32

25 DET LEVEL

31 AGC CONT

32 AGC MAX

13 CLP1

14 P BLK

15 WND

36 CLP4

130

13

14

H: 4V and above

L: 1V and below

130

15

36

Description

Level adjustment pin of high

luminance detection pin of the

input signal

Gain adjustment pin of input

signal high luminance part

Gain adjustment pin of high

luminance port after AGC

Level adjustment pin of high

luminance detection after AGC

Adjustment pin of IRIS output

weighting (Active at WND = L)

Gain adjustment pin of IRIS

output

Adjustment pin of DET output

weighting (Active at WND = L)

AGC amplifier gain

adjustment pin

AGC amplifier MAX gain

adjustment pin

CLP1 pulse input pin

Active at H (OPB clamp)

Pre BLK pulse input pin

Active at L

Window pulse input pin

Active at L

CLP4 pulse input pin

Active at H

16 VG OUT

2.6 to 3.1V

100µA

Regulator output pin

16

(Used for the formation of

AGC and IRIS loop)

28 OP IN +

29 OP IN –

130

28

1 to 3.3V

130

29

–3–

Operation amplifier non

inverted input pin

Operation amplifier inverted

input pin

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