DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PM7339 데이터 시트보기 (PDF) - PMC-Sierra

부품명
상세내역
제조사
PM7339 Datasheet PDF : 81 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
RELEASED
DATASHEET
PMC-2000313
ISSUE 2
PM7339 S/UNI-CDB
SATURN USER NETWORK INTERFACE CELL DELINEATION BLOCK
1 FEATURES
Quad cell delineation device operating up to a maximum rate of 52 Mbit/s.
Provides a UTOPIA Level 2 compatible ATM-PHY Interface.
Implements the Physical Layer Convergence Protocol (PLCP) for DS1
transmission systems according to the ATM Forum User Network Interface
Specification and ANSI TA-TSY-000773, TA-TSY-000772, and
E1transmission systems according to the ETSI 300-269 and ETSI 300-270.
Uses the PMC-Sierra PM4341 T1XC, PM4344 TQUAD, PM6341 E1XC, and
PM6344 EQUAD T1 and E1 framer/line interface chips for DS1 and E1
applications.
Provides programmable pseudo-random test pattern generation, detection,
and analysis features.
Provides integral transmit and receive HDLC controllers with 128-byte FIFO
depths.
Provides performance monitoring counters suitable for accumulation periods
of up to 1 second.
Provides an 8-bit microprocessor interface for configuration, control and
status monitoring.
Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board
test purposes.
Low power 3.3V CMOS technology with 5V tolerant inputs.
Available in a high density 256-pin SBGA package (27mm x 27mm).
The receiver section:
Provides PLCP frame synchronization, path overhead extraction, and cell
extraction for DS1 PLCP and E1 PLCP formatted streams.
Provides a 50 MHz 8-bit wide or 16-bit wide Utopia FIFO buffer in the receive
path with parity support, and multi-PHY (Level 2) control signals.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 6

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]