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MB86604 데이터 시트보기 (PDF) - Fujitsu

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MB86604 Datasheet PDF : 56 Pages
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MB86604L
s BLOCK DIAGRAM
D15 to D8, UDP
TMOUT INT D7 to D0, LDP WR RD CS0 CS1 A4 to A0 BHE MODE
MSG
C/D
I/O
ATN
BSY
SEL
RST
REQ
ACK
DB7 to DB0
DBP
Internal
processor
MPU interface
Registers
Timer
Phase
controller
Transfer
controller
Receive MCS buffer
(32 bytes)
Send MCS buffer
(32 bytes)
Command user
program memory
(256 bytes)
Data register
(32 bytes)
DREQ
DACK
DMBHE
DMA0
DMD15
to DMD8
UDMDP
DMD7
to DMD0
LDMDP
IOWR
IORD
TP
8

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