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CDP68HC68S1 데이터 시트보기 (PDF) - Intersil

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CDP68HC68S1 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Specifications CDP68HC68S1
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7.0V
Input Voltage (VIN) . . . . . . . . . . . . . . . . . . VSS -0.3V to VDD+0.3VDC
DC Input Current (IIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Thermal Resistance
θJA
Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100oC/W
Plastic SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . 120oC/W
Storage Temperature Range (TSTG) . . . . . . . . . . . . -55oC to +125oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Temperature (TA) . . . . . . . . . . . . . . . . . . -40oC to +105oC DC Operating Voltage Range (VDD) . . . . . . . . . . . . . . . . +4V to +7V
DC Electrical Specifications TA = -40oC to +105oC Unless Otherwise Noted. External Bias (VO) shall be 1.8V to 3.13V Unless
Otherwise Noted.
PARAMETERS
SYMBOLS
TEST CONDITIONS
MIN
MAX
UNITS
SIGNAL I/O SECTION
Output Voltage High Level
Output Voltage Low Level
Input Voltage Low Level
Input Voltage High Level
Output High Drive (Source) Current
(REC Pin)
VOL
VOH
VIL
VIH
IOH
Open Circuit
Open Circuit
VOH = 4.6V, VDD = 5V
-
0.05
VDC
VDD-0.05
-
VDC
-
0.3VDD
VDC
0.7VDD
-
VDC
-0.12
-
mA
Output High Drive (Source) Current
(IDLE, Control Pins)
IOH
VOH = 4.6V, VDD = 5V
-0.04
-
mA
Output Low Drive (Sink) Current
(IDLE, Control, REC)
IOL
VOH = 0.4V, VDD = 5V
0.36
-
mA
DIFFERENTIAL TRANSCEIVER (SEE FIGURE 4) TRANSMITTER
BUS+
BUS-
IAOL - IBOL Match
Output Rise Time (BUS+)
Output Fall Time (BUS-)
Transition match (50% Point)
RECEIVER
IAOL
IAOH
IBOL
IBOH
IM
tR
tF
tM
VO = VDD/2, RL = 120
VO = VDD/2, RL = 120
VO = VDD/2, RL = 120
VO = VDD/2, RL = 120
VO = VDD/2, RL = 120,
VDD = 5V ±0.5V
VDD = 5V, CL = 25pF
VDD = 5V, CL = 25pF
VDD = 5V, CL = 25pF
2.75
-
mA
-1.0
1.0
µA
-
-2.75
mA
-1.0
1.0
µA
-
5
%
-
1.5
µs
-
1.5
µs
-50
50
ns
Differential Sensitivity
Hysteresis (Within VIDH, VIDL Limits)
Propagation Delay
Out of Range
Quiescent Device Current
Clock Speed
VIDH
VO = 2.5V, RL = 120, VDD = 5V
-
VIDL
VO = 2.5V, RL = 120, VDD = 5V
20
VH
VO = 2.5V, RL = 120, VDD = 5V
20
tP
VIDH =120mV, VDD = 5V
-
VAX
VDD = 5V
3.8
VMIN
VDD = 5V
-
IDD
VDD = 0V, VO = 2.5V
-10
fOP
VDD = 5, RL = 120, CL = 25pF
-
120
-
-
700
-
1.2
10
TBD
(Note)
mV
mV
mV
ns
V
V
µA
MHz
NOTE: Although 1MHz is generally used as an example throughout this datasheet, the maximum speed limit may be higher and depends
upon user’s noise tolerance requirements.
6-86

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