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BU9877FV 데이터 시트보기 (PDF) - ROHM Semiconductor

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BU9877FV Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Memory ICs
Circuit operation
(1) Synchronous data I / O timing
tR
SCL
t HD: STA
t SU: DAT
SDA
(input)
SDA
(output)
t BUF
BU9877FV
tF
t HIGH
t LOW
t PD
t HD: DAT
t DH
SCL
SDA
t SU: STA
t HD: STA
START BIT
Fig. 5
• Reading of input is done at the rising edge of SCL.
• Output of data is synchronized to the falling edge of SCL.
t SU: STO
STOP BIT
4

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