VES1848 데이터 시트보기 (PDF) - Philips Electronics

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VES1848

Single Chip DAVIC/DVB-RC Cable Modem

Philips Electronics 

Philips Semiconductors

Single Chip DAVIC/DVB-RC Cable Modem

Product specification

VES1848

1 GENERAL DESCRIPTION

FIGURE 1 : FUNCTIONAL BLOCK DIAGRAM

fixed

ADC

IF

DQPSK

demodulator

Out Of Band

channel processing

MPEG2-TS

symbol clock

In Band

channel processing

MAC

interface

application layers

interface

external

synchro

programmable

IF or I

DAC

Q

QPSK / 16QAM

burst modulator

Up Stream

synchronisation

Up Stream

channel encoding

1.1 ABREVIATIONS

AGC

BW

CRC

DS

HE

HEC

IB

IF

NIU

OOB

PWM

SL-ESF

STB

US

UW

Automatic Gain Control

Bandwidth

Cyclic Redundancy Checking (type of error correction code)

Down Stream (from the Headend to the set-top box)

Headend

Header Error Control (CRC of the ATM cell header)

In Band

Intermediate Frequency

Network Interface Unit (physical and MAC layers of the STB)

Out Of Band

Pulse Wave Modulation

Signalling Link Extended SuperFrame (name of the OOB frame)

Set-Top Box

Up Stream (from the set-top box to the headend)

Unique Word (=preamble)

1.2 NOTATION

References to programmation registers are done this way :

AD.7 = bit 7 (in decimal) of the register located at the address AD (in hexa).

AD.[7-5] = bits 7 down to 5 of the register located at the address AD.

1.3 FUNCTIONAL DESCRIPTION

½ ADC

The VES 1848 implements a 7-bit analog to digital converter. It directly samples the OOB IF signal. The IF value

can be chosen by the system designer.

1999 Jul 01

3

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