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HCMP9650 데이터 시트보기 (PDF) - Signal Processing Technologies

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HCMP9650
SPT
Signal Processing Technologies SPT
HCMP9650 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Figure 2 - Internal Function Diagram
TYPICAL INTERFACE CIRCUIT
Q
V IN
+
PRE
AMP
VIN
-
LATCH
ECL
OUT
REF1
REF
2
CLK
BUF
V EE
VCC
GND 1
LE
GND 2
GENERAL INFORMATION
The HCMP96850 is an ultrahigh speed single voltage com-
parator. It offers tight absolute characteristics which guaran-
tee matching from package to package. The device has
differential analog inputs and complementary logic outputs
compatible with ECL systems. The output stage is adequate
for driving terminated 50 Ohm transmission lines.
The HCMP96850 has one latch enable control and should be
driven by standard ECL logic levels. It also has two separate
ground pins, one for the output to accommodate large
ground currents without affecting the rest of the circuit, while
the other is for the small signal intermediate stages. The
input stage is referenced to VCC and VEE.
A typical interface circuit using the comparator is shown in
figure 3. Although it needs few external components and is
easy to apply, there are several considerations that should
be noted to achieve optimal performance. The very high
operating speeds of the comparator require careful layout,
decoupling of supplies, and proper design of transmission
lines.
Since the HCMP96850 comparator is a very high frequency
and high gain device, certain layout rules must be followed
to avoid spurious oscillations. The comparator should be
soldered to the board with component lead lengths kept as
short as possible. A ground plane should be used, while the
input impedance to the part is kept as low as possible, to
decrease parasitic feedback. If the output board traces are
longer than approximately one-half inch, microstripline tech-
niques must be employed to prevent ringing on the output
waveform. Also, the microstriplines must be terminated at
the far end with the characteristic impedance of the line to
prevent reflections. All voltage supply pins should be de-
coupled with high-frequency capacitors as close to the
device as possible. All ground pins and no connects should
be connected to a common ground plane to further improve
noise immunity.
On the HCMP96850, all outputs, whether used or unused,
should have identical terminations to minimize ground cur-
rent switching.
Figure 3 - Typical Interface Circuit
VCC GND1 VEE
Noninverting
Input
VIN
+
VREF
-
Inverting
Input
LE
.1 µF
Q Output
Q Output
GND2 RL
-2 V
Pulldown
.1 µF
= Represents line termination.
SPT
HCMP96850
5
3/18/97

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