CXD2719Q 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD2719Q Datasheet PDF : 59 Pages
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CXD2719Q
Pin Description
Notations in parentheses indicate the fixed pin connection status.
Pin No. Symbol I/O
Description
1 to 3
4
5 to 8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
T.P
VSS0
T.P
TST0
VDD0
VSS1
TST1
TST2
TST3
TST4
XRST
BFOT
CSL1
CSL2
VSS2
AVS3
AVD3
LOUT
AVD1
AVS1
LO1
LIN
AVD5
AVS5
XCOUT
AVDX
XTLO
XTLI
AVSX
XSOUT
AVS6
AVD6
O Test monitor. Normally outputs Low.
— Digital GND.
O Test monitor. Normally outputs Low.
I Test. Normally fixed Low.
— Digital power supply.
— Digital GND.
I Test. Normally fixed Low.
I Test. Normally fixed Low.
I Test. Normally fixed Low.
I Test. Normally fixed Low.
I System reset input. Reset when Low.
O Clock, frequency-division output. [384/768/256/512fs]
I Test. Normally fixed High.
I Test. Normally fixed Low.
— Digital GND.
— L-ch DA converter GND.
— L-ch DA converter power supply.
O L-ch DA converter output.
— L-ch AD converter power supply.
— L-ch AD converter GND.
O L-ch AD converter LPF operational amplifier inverted output.
I L-ch AD converter analog input.
— C-ch DA converter power supply.
— C-ch DA converter GND.
O C-ch DA converter output.
— Analog power supply for master clock.
O Crystal oscillator circuit output.
I Crystal oscillator circuit input.
— Analog GND for master clock.
O S-ch DA converter output.
— S-ch DA converter GND.
— S-ch DA converter power supply.
(OPEN): Open, (VDD): +5V digital power supply, (AVDD): +5V analog power supply,
(VSS): Digital GND, (AVSS): Analog GND
(OPEN)
(VSS)
(OPEN)
(VSS)
(VDD)
(VSS)
(VSS)
(VSS)
(VSS)
(VSS)
(VDD)
(VSS)
(VSS)
(AVSS)
(AVDD)
(AVDD)
(AVSS)
(AVDD)
(AVSS)
(AVDD)
(AVSS)
(AVSS)
(AVDD)
–3–
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