E28F004B5-B60 데이터 시트보기 (PDF) - Intel
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E28F004B5-B60 Datasheet PDF : 38 Pages
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E
SMART 5 BOOT BLOCK MEMORY FAMILY
5.5 AC Characteristics—Read Operations—Commercial and Extended
Temperature
Temp
Commercial
Extended
Speed
-60/-70
-80/-90
-80/-90
# Sym
Parameter
VCC 5V ± 5%(4) 5V±10% (5) 5V± 10%(5) 5V± 10%(5) Unit
Load 30 pF
100 pF
100 pF
100 pF
Notes Min Max Min Max Min Max Min Max
R1 tAVAV Read Cycle
2, 4 Mbit
60
70
80
80
ns
Time
8 Mbit
70
80
90
90
ns
R2 tAVQV Address to
Output Delay
2, 4 Mbit
8 Mbit
60
70
80
80 ns
70
80
90
90 ns
R3 tELQV CE# to
2, 4 Mbit 2
Output Delay 8 Mbit
60
70
80
80 ns
70
80
90
90 ns
R4 tGLQV OE# to Output Delay
2
30
35
40
40 ns
R5 tPHQV RP# to Output Delay
450
450
450
450 ns
R6 tELQX CE# to Output in Low Z
30
0
0
0
ns
R7 tGLQX OE# to Output in Low Z
30
0
0
0
ns
R8 tEHQZ CE# to Output in High Z
3
20
20
20
25 ns
R9 tGHQZ OE# to Output in High Z
3
20
20
20
25 ns
R10 tOH Output Hold from Address,
3
0
0
0
0
ns
CE#, or OE# Change,
Whichever Occurs First
NOTES:
1. See AC Input/Output Reference Waveform for timing measurements.
2. OE# may be delayed up to tCE–tOE after the falling edge of CE# without impact on tCE.
3. Sampled, but not 100% tested.
4. See Test Configuration (Figure 13), 5 V High-Speed Test component values.
5. See Test Configuration (Figure 13), 5 V Standard Test component values.
6. Dynamic BYTE# switching between word and byte modes is not supported. Mode changes must be made when the device
is in deep power-down or powered down.
ADVANCE INFORMATION
31
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