PM5945 데이터 시트보기 (PDF) - PMC-Sierra

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PM5945

SONET ATM PHYSICAL INTERFACE BOARD

PMC-Sierra 

S TANDARD PRODUCT

PMC-Sierra, Inc.

PM5945 SAPI

PMC-940106 ISSUE 3, May 16, 1994

SAPI DAUGHTERBOARD

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The SUNI receives SONET/SDH frames via a bit serial interface, and processes

section, line, and path overhead. It performs framing (A1, A2), descrambling, detects

alarm conditions, and monitors section, line, and path bit interleaved parity (B1, B2,

B3), accumulating error counts at each level for performance monitoring purposes.

Line and path far end block error indications (FEBE) are also accumulated. The

SUNI interprets the received payload pointers (H1, H2) and extracts the

synchronous payload envelope which carries the received ATM cell payload.

The SUNI frames to the ATM payload using cell delineation. Header check

sequence (HCS) error correction is provided. Idle/unassigned cells may be

dropped according to a programmable filter. Cells are also dropped upon detection

of an Uncorrectable HCS error. The ATM cell payloads are descrambled. The ATM

cells that are passed are written to a four cell FIFO buffer. The received cells are

read from the FIFO using a generic 8-bit wide datapath interface. Counts of received

ATM cell headers that are erred and uncorrectable, and also those that are erred

and correctable, are accumulated independently for performance monitoring

purposes.

The SUNI transmits SONET/SDH frames via a bit serial interface, and formats

section, line, and path overhead bytes appropriately. It performs framing pattern

insertion (A1, A2), scrambling, alarm signal insertion, and inserts section, line, and

path bit interleaved parity (B1, B2, B3) as required to allow performance monitoring

at the far end. Line and path far end block error indications (FEBE) are also

inserted. The SUNI generates the payload pointer (H1, H2) and inserts the

synchronous payload envelope which carries the ATM cell payload. The SUNI also

supports the insertion of a large variety of errors into the transmit stream, such as

framing pattern errors, bit interleaved parity errors, and illegal pointers, which are

useful for system diagnostics and tester applications.

Transmit ATM cells are written to an internal four cell FIFO using a generic 8-bit wide

datapath interface. Idle/unassigned cells are automatically inserted when the

internal FIFO contains less than one cell. The SUNI provides generation of the

header check sequence and scrambles the payload of the ATM cells. Each of these

transmit ATM cell processing functions can be enabled or bypassed.

The SUNI is configured, controlled and monitored via the UTOPIA interface to the

Vicksburg motherboard.

For a complete description of the SUNI, please refer to PMC-Sierra's PM5345

datasheet.

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