LRS1331 데이터 시트보기 (PDF) - Sharp Electronics
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LRS1331 Datasheet PDF : 26 Pages
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Stacked Chip (16M Flash & 4M SRAM)
LRS1331
Table 3. Command Definition for Flash Memory1
COMMAND
BUS CYCLES
FIRST BUS CYCLE
REQUIRED OPERATION2 ADDRESS3 DATA3
SECOND BUS CYCLE
OPERATION2 ADDRESS3 DATA3 NOTES
Read Array/Reset
1
Read Identifier Codes
≥2
Read Status Register
2
Clear Status Register
1
Block Erase
2
Full Chip Erase
2
Word Write
2
Block Erase and Word
Write Suspend
1
Block Erase and
Write Resume
1
Set Block Lock-Bits
2
Clear Block Lock-Bits
2
Set Permanent Lock-Bits
2
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
XA
FFH
XA
90H
Read
XA
70H
Read
XA
50H
BA
20H
Write
XA
30H
Write
WA
40H or 10H
Write
XA
B0H
XA
D0H
BA
60H
Write
XA
60H
Write
XA
60H
Write
IA
ID
4
XA
SRD
BA
D0H
5
XA
D0H
WA
WD
5
5
5
BA
01H
6
XA
D0H
6, 7
XA
F1H
NOTES:
1. Commands other than those shown in table are reserved by SHARP for future device
implementations and should not be used.
2. BUS operations are defined in Table 2.
3. XA = Any valid address within the device;
IA = Identifier code address;
BA = Address within the block being erased;
WA = Address of memory location to be written;
SRD = Data read from status register;
WD = Data to be written at location WA. Data is latched on the
rising edge of F-WE or F-CE (whichever goes HIGH first);
ID = Data read from identifier codes.
4. See Table 4 for Identifier Codes.
5. See Table 5 for Write Protection Alternatives.
6. If the permanent lock-bit is set, Set Block Lock-Bit and Clear Block Lock-Bits commands cannot be done.
7. The clear block lock-bits operation simultaneously clears all block lock-bits.
Table 4. Identifier Codes
CODES
Manufacture Code
Device Code
Block Lock
Configuration
Block is Unlocked
Block is Locked
Permanent Lock Device is Unlocked
Configuration
Device is Locked
ADDRESS (A0 - A19)
00000H
00001H
BA + 2
BA + 2
00003H
00003H
DATA (DQ0 - DQ7)1
B0H
E9H
DQ0 = 0
DQ0 = 1
DQ0 = 0
DQ0 = 1
NOTES:
1. DQ8 - DQ15 outputs 00H in word mode. DQ1 - DQ7 are reserved for future use.
2. BA selects the specific block lock configuration code to be read. See Figure 3
for the device identifier code memory map.
NOTES
2
2
Data Sheet
5
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