LRI512 데이터 시트보기 (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

BIT REPRESENTATION AND CODING

Data bits are encoded using Manchester coding,

according to the following schemes.

For the low data rate the same subcarrier frequen-

cy or frequencies are used, in this case the num-

ber of pulses shall be multiplied by 4 and all times

will increase by this factor.

Bit Coding Using One Subcarrier

High Data Rate. A logic 0 starts with 8 pulses of

423.75 kHz (fC/32) followed by an unmodulated

time of 18,88µs as shown in Figure 12.

Figure 12. Logic 0, High Data Rate

Low Data Rate. A logic 0 starts with 32 pulses of

423.75 kHz (fC/32) followed by an unmodulated

time of 75.52 µs as shown in Figure 14.

Figure 14. Logic 0, Low Data Rate

149.86 µs (ISO=151.04 µs)

AI06666

37.76 µs

AI06663

A logic 1 starts with an unmodulated time of

75.52 µs followed by 32 pulses of 423.75 kHz (fC/

32) as shown in Figure 15.

Figure 15. Logic 1, Low Data Rate

A logic 1 starts with an unmodulated time of

18.88 µs followed by 8 pulses of 423.75 kHz (fC/

32) as shown in Figure 13.

Figure 13. Logic 1, High Data Rate

149.86 µs (ISO=151.04 µs)

AI06665

37.76 µs

AI06664

9/54

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