Advanced Information
LATCH
MC
MD
tMCY
tMCH
tMCL
tMDS
tMDH
tMLL
tMLD
WM8722
tMHH
tMLS
LSB
Figure 3. Program Register Input Timing – 3-Wire MPU Serial Control Mode
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Program Register Input Information
MC pulse cycle time
tMCY
MC pulse width low
tMCL
MD pulse width high
tMCH
MD set-up time
tMDS
MC hold time
tMDH
LATCH pulse width low
tMLL
LATCH pulse width high
tMHH
LATCH set-up time
tMLS
LATCH delay from MC
tMLD
TEST CONDITIONS
MIN
TYP
100
40
40
20
20
20
20
20
20
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
AI Rev 1.5 May 2000
7