AD1855 데이터 시트보기 (PDF) - Analog Devices

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AD1855

Stereo, 96 kHz, Multibit ΣΔ DAC

Analog Devices 

SPI Port Modes

The SPI port can be used in either of two modes, Burst Mode,

or Continuous CCLK Mode, as described below:

Continuous CCLK Mode

In this mode, the maximum CCLK frequency is 3 MHz. The

CCLK can run continuously between transactions. Please note

that the Low-to-Hi transition of the CLATCH with respect to

the rising edge of CCLK must be at least 130 ns, as shown in

Figure 7.

AD1855

Burst Mode

To operate with SPI CCLK frequencies up to 12.288 MHz, the

SPI port can be operated in Burst Mode. This means that when

CLATCH is high, CCLK cannot be HI, as shown in Figure 8.

CLATCH

CCLK

>130ns

CDATA

20

40

60

80

100

120

140

160

180

TIME – ns

Figure 7. SPI Port Continuous CCLK Mode

CLATCH

CCLK

CDATA

200

400

600

800

1000

1200

TIME – ns

Figure 8. SPI Port Burst Mode

1400

1600

1800

REV. B

–9–

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