CXA2016S 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA2016S

Sync Identification for CRT Display

Sony Semiconductor 

Pin Description

Pin

Symbol

No

Pin

voltage

1 VS IN 2.6 V

2

PVC

—

3

EVC

—

4 CS IN 2.6 V

5

PHC

—

6

EHC

—

CXA2016S

Equivalent circuit

VCC

1k

100

1

1k

96k

2

1k

8k

200 200

GND

VCC

GND

VCC

200 1k

3

GND

VCC

1k

100

4

96k

5

1k

8k

GND

VCC

GND

1k

1k

100

6

1k

VCC

GND

—2—

(Ta=25 °C, VCC=5 V)

Description

V. separate sync (positive/negative

polarity) as capacitor input. Amplitude

is 1 to 5 Vp-p.

This pin connects a 0.22 µF

integrating capacitor for the vertical

signal polarity check circuit to GND.

When connecting the capacity at

positive polarity, it is 2.9 V and at

negative polarity, 120 mV.

V. ramp waveforms generation part of

vertical signal exist check circuit.

Generates ramp waveforms

synchronously with the input signal

cycle and connects 0.22 µF to GND.

Inputs composite sync

(positive/negative polarity) and H.

separate sync (positive/negative

polarity) as capacitor input. Amplitude

is 1 to 5 Vp-p.

This pin connects a 0.1 µF integrating

capacitor for the horizontal signal

polarity check circuit to GND. When

connecting the capacity at positive

polarity, it is 2.6 V and at negative

polarity, 350 mV.

A 33 kΩ resistance and a nearly peak

hold circuit for 0.22 µF capacitor are

connected to this pin for input signal

exist check at CS IN input pin. When

a signal is input at CS IN pin, a nearly

peak hold is executed at 2.1 V to 2.7

V, a comparison is made with the 1.4

V reference voltage, and input signal

exist is identified.

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