FST16232 데이터 시트보기 (PDF) - Fairchild Semiconductor
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FST16232 Datasheet PDF : 6 Pages
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AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
VCC = 4.0V
Units
Conditions
Figure
No.
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
150
150
MHz VI = OPEN
Figure 1
Figure 2
tPHL, tPLH Prop Delay Bus to Bus (Note 6)
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
tPHL, tPLH Prop Delay CLK to B or A
2.0
6.3
6.0
ns
VI = OPEN
Figure 1
Figure 2
tPZH, tPZL Output Enable Time
1.7
8.5
9.0
CLK to A = B1 = B2
Output Enable Time
2.0
6.5
6.5
CLK to A or B1 or B2
tPHZ, tPLZ Output Disable Time
1.0
8.5
9.0
CLK to A or B
tS
Setup Time S1, S0 before CLK ↑
2.5
2.8
Setup Time CLKEN before CLK ↑
1.8
2.0
ns
VI = 7V for tPZL,
VI = OPEN for tPZH
ns
VI = 7V for tPZL,
VI = OPEN for tPZH
ns
VI = 7V for tPLZ,
VI = OPEN for tPHZ
ns
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
tH
Hold Time S1, S0 after CLK ↑
1.0
1.0
ns
Hold Time CLKEN after CLK ↑
1.5
1.5
Figure 1
Figure 2
tW
Pulse Width
3.1
3.1
ns Clock HIGH or LOW
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 7)
Symbol Parameter
Typ
CIN
Control pin Input Capacitance
4
CI/O
Input/Output Capacitance
7
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Max
Units
pF
pF
Conditions
VCC = 5.0V
VCC = 5.0V, S0, S1 = 0V
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
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FIGURE 2. AC Waveforms
4
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