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SAA7780 데이터 시트보기 (PDF) - Philips Electronics

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SAA7780
Philips
Philips Electronics Philips
SAA7780 Datasheet PDF : 70 Pages
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Philips Semiconductors
Product Specification
ThunderBird Q3D PCI Audio
Accelerator
SAA7780
to this register will discharge the external capacitors to emulate the 558 one shots. Software can then poll the joystick
register bit to resolve each of the joystick axes positions by timing. The joystick button register bits have meaning in
both the digital and analog modes. The axes bits are only valid for analog mode.
Game Port 558-Based Register - Gameport (RO) )
I/O GMBASE
Offset 1h
POR Value
D7
JOYB_2
1
D6
JOYB_1
1
D5
JOYA_2
1
D4
JOYA_1
1
D3
JOYB_Y
0
D2
JOYB_X
0
D1
JOYA_Y
0
D0
JOYA_X
0
Bit
7
Name
JOYB_2
6
JOYB_1
5
JOYA_2
4
JOYA_1
3
JOYB_Y
2
JOYB_X
1
JOYA_Y
0
JOYA_X
R/W
RO
RO
RO
RO
RO
RO
RO
RO
Function
Joystick B button 2 status. The joystick buttons should be de-bounced and
de-glitched from the chip interface. The joystick button status registers are
cleared when the joystick button is pressed.
Joystick B button 1 status.
Joystick A button 2 status.
Joystick A button 1 status.
Joystick B y-coordinate. Can also be referred to as position 3.
Joystick B x-coordinate. Can also be referred to as position 2.
Joystick A y-coordinate. Can also be referred to as position 1.
Joystick A x-coordinate. Can also be referred to as position 0.
SAA7780 Signal Definitions
PCI Local Bus Interface Signals
AD[31:0]
39,42,43,44, IO-T
45,46,48,49,
52,53,55,57,
59,61,63,64,
77,78,79,82,
83,85,86,87,
89,91,92,93,
94,95,97,98
PCI Address/Data
AD[31:0] contains a physical byte address during the first clock of a
PCI transaction, and data during subsequent clocks.
When the SAA7780 is a PCI master, AD[31:0] are outputs during
the address phase of a transaction. They are either inputs or outputs
during the data phase, depending on the type of PCI cycle in
process.
When the SAA7780 is a PCI slave, AD[31:0] are inputs during the
address phase. They are either inputs or outputs during the data
phase, depending on the type of PCI cycle in process.
1999 Sep 30
15

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