SPT7853SCT 데이터 시트보기 (PDF) - Signal Processing Technologies
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SPT7853SCT Datasheet PDF : 10 Pages
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Figure 1a – Timing Diagram 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
ANALOG IN
CLOCK IN
SAMPLING CLOCK
(Internal)
DIGITAL OUT
INVALID
VALID
1
2
3
4
5
6
78
9
10 11
DATA VALID
Figure 1b – Timing Diagram 2
tC
tCH
tCL
tCLK
CLOCK
IN
tOD
DATA
OUTPUT Data 0
DA, DB, DC
Data 1
DATA
VALID
tDAV
tDAV
tS
Table I – Timing Parameters
Description
Parameters Min Typ Max Units
Conversion time
tC
2 x tCLK
nS
Clock period
tCLK
16.67
nS
Clock duty cycle
45 50 55
%
Clock to output delay (15 pF load) tOD
19
nS
DAV pulse width
tDAV
tCLK
nS
Clock to DAV
tD
6.5
nS
Data 2
SPT
4
SPT7853
12/14/99
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