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IW4023BD 데이터 시트보기 (PDF) - Integral Corp.

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IW4023BD
Integral
Integral Corp. Integral
IW4023BD Datasheet PDF : 4 Pages
1 2 3 4
TECHNICAL DATA
Triple 3-Input NAND Gate
High-Voltage Silicon-Gate CMOS
IW4023B
The IW4023B NAND gates provide the system designer with
direct emplementation of the NAND function.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4023BN Plastic
IW4023BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
A BC
L XX
X LX
X XL
H HH
X = don’t care
Output
Y
H
H
H
L
45

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