HI1260JCQ 데이터 시트보기 (PDF) - Intersil
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HI1260JCQ Datasheet PDF : 13 Pages
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HI1260
Absolute Maximum Ratings TA = 25oC
Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 7V
Input Voltage (Digital)
VI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC
VCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC
Input Voltage (VSET Pin), VSET . . . . . . . . . . . . . . . . . . -0.3V to VCC
Output Voltage (Analog), VOUT . . . . . . . . . . . . . . VCC -2.1V to VCC
Output Current (Analog), IOUT . . . . . . . . . . . . . . . . . . -3mA to 10mA
(VREF Pin), IREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA to 0mA
Allowable Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . 0.7W
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-55oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(Lead Tips Only)
Recommended Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -20oC to 75oC
Supply Voltage
AVCC, DVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
AVCC - DVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.2V to 0.2V
AGND - DGND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.0.5V
Digital Input Voltage
H Level, VIH, VCLKH . . . . . . . . . . . . . . . . . . . . . . . . .2.0V to DVCC
L Level, VIL, VCLKL. . . . . . . . . . . . . . . . . . . . . . . . . DGND to 0.8V
VSET Input Voltage, VSET . . . . . . . . . . . . . . . . . . . . . . . 0.7V to 1.0V
VREF Pin Current, IREF. . . . . . . . . . . . . . . . . . . . . . . -3mA to 0.4mA
Clock Pule Width
tPW1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15ns
tPW0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC, AVCC = DVCC = 5.0V, AGND = DGND = 0.0V
Resolution
Monotony
PARAMETER
SYMBOL
RSL
MNT
TEST CONDITIONS
NOTES
Differential Linearity Error
Integral Linearity Error
DLE VSET - AGND = 0.87V
ILE
RL > 10kΩ
FS = Full Scale
Maximum Conversion Speed
Full Scale Output Voltage
RGB Output Voltage Full Scale Ratio
fMAX
VOFS
FSR
VSET - AGND = 0.87V
RL > 10kΩ CL < 20pF
Note 3
Note 4
Output Zero Offset Voltage
VOFFSET
Output Resistance
RO
Consumption Current
ID
VSET - AGND = 0.87V
RL > 10kΩ
IREF = -400µA
Digital Data Input
Current
H
Level
Upper 2 Bits
Lower 6 Bits
IIH(U)
IIH(L)
VI = DVCC
L
Level
Upper 2 Bits
Lower 6 Bits
IIL(U)
IIL(L)
VI = DGND
Clock Input Current
H Level
ICLKH VCLK = DVCC
L Level
ICLKL VCLK = DGND
VSET Input Current
ISET VSET = AGND = 0.87V
Internal Reference Voltage
VREF IREF = -400µA
Set-Up Time
tS
Hold Time
tH
NOTES:
3.
4.
AVCC - V0.
Maximum value among100 ×
-V----O----F----S----(--R----)
VO FS(G)
–1
, 100
×
V-----O----F----S----(--G----)
VO FS(B)
–1
, or
100 ×
-V----O----F----S----(--B----)
VO FS(R)
–1
.
MIN
-
-
-0.5
-0.4
35
0.85
0
-40
270
54
-
-
-10
-10
-
-10
-5
1.08
12
3
TYP
8
Guar-
antee
-
-
-
1.0
4
-6
340
72
1.2
0.6
0
0
3
0
-0.3
1.20
-
-
MAX
-
-
UNITS
Bit
-
0.5
LSB
4 % of FS
-
MSPS
1.15
8
VP-P
%
0
mV
420
Ω
90
mA
20
µA
10
µA
10
µA
10
µA
30
µA
10
µA
0
µA
1.32
V
-
ns
-
ns
10-5
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