MC100LVEL30(2016) 데이터 시트보기 (PDF) - ON Semiconductor
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MC100LVEL30 Datasheet PDF : 6 Pages
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MC100LVEL30
VCC Q0 Q0 VCC Q1 Q1 VCC Q2 Q2 VEE
20 19 18 17 16 15 14 13 12 11
QQ
S
R
D
QQ
S
R
D
QQ
S
R
D
1 2 3 4 5 6 7 8 9 10
S012 D0 CLK0 R0 D1 CLK1 R1 D2 CLK2 R2
Warning: All VCC and VEE pins must be externally connected to
Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 2. PIN DESCRIPTION
PIN
FUNCTION
D0−D2
R0−R2
CLK0−CLK2
S012
Q0−Q2; Q0−Q2
VCC
VEE
ECL Data Inputs
ECL Reset Inputs
ECL Clock Inputs
ECL Common Set Input
ECL Differential Data Outputs
Positive Supply
Negative Supply
Table 1. TRUTH TABLE
R
S
D CLK
L
L
L
Z
L
L
H
Z
H
L
X
X
L
H
X
X
H
H
X
X
Z = LOW to HIGH Transition
X = Don’t Care
Q
L
H
L
H
Undef
Q
H
L
H
L
Undef
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC PECL Mode Power Supply
VEE
NECL Mode Power Supply
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
Iout
Output Current
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
Continuous
Surge
VI ≤ VCC
VI ≥ VEE
8 to 0
V
−8 to 0
V
6 to 0
V
−6 to 0
50
mA
100
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−20 WB
SOIC−20 WB
−40 to +85
−65 to +150
90
60
°C
°C
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Tsol
Wave Solder
Standard Board
< 2 to 3 sec @ 248°C
SOIC−20 WB
30 to 35
265
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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